∑ AUTOMATIC FPGA BASED IMPLEMENTATION OF A CLASSIFICATION TREE
Low-Latency Optimizations and Architectures for Compression Algorithms implemented in (Programmable) Hardware
VYSOKÉ UČENÍ TECHNICKÉ V BRNĚ BRNO UNIVERSITY OF TECHNOLOGY
VYSOKÉ UČENÍ TECHNICKÉ V BRNĚ
Ring Oscillator Based Clock Glitch Attack
A Customizable Software Tool for Hardware in the Loop Tests
С ИСТЕМА ОБРАБОТКИ СЕНСОРНЫХ ДАННЫХ НА ОСНОВЕ A RDUINO A RDUINO -B ASED S YSTEM FOR S ENSORY D ATA P ROCESSING